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RT8250 1 ds8250-05 march 2011 www.richtek.com general description the RT8250 is a high-efficiency synchronous step-down dc/dc converter that can deliver up to 3a output current from 4.5v to 23v input supply. the RT8250's current mode architecture and external compensation allow the transient response to be optimized over a wide range of loads and output capacitors. cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. the RT8250 also provides output under voltage protection and thermal shutdown protection. the low current (<3 a) shutdown mode provides output disconnection, enabling easy power management in battery-powered systems. 3a, 23v, 340khz synchronous step-down converter features 4.5v to 23v input voltage range 1.5% high accuracy feedback voltage 3a output current integrated n-mosfet switches current mode control fixed frequency operation : 340khz output adjustable from 0.925v to 20v up to 95% efficiency programmable soft-start stable with low-esr ceramic output capacitors cycle-by-cycle over current protection input under voltage lockout output under voltage protection thermal shutdown protection thermally enhanced sop-8 (exposed pad) package rohs compliant and halogen free applications industrial and commercial low power systems computer peripherals lcd monitors and tvs green electronics/appliances point of load regulation of high-performance dsps, fpgas and asics. pin configurations (top view) sop-8 (exposed pad) ss boot vin gnd sw fb en comp 2 3 4 5 8 7 6 gnd 9 package type sp : sop-8 (exposed pad-option 1) RT8250 lead plating system g : green (halogen free and pb free) ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. marking information RT8250gsp : product number ymdnn : date code RT8250 gspymdnn
RT8250 2 ds8250-05 march 2011 www.richtek.com functional pin description pin no. pin name pin function 1 boot bootstrap for high side gate driver. connect a 10nf or greater ceramic capacitor from the boot pin to sw pin. 2 vin voltage supply input. the input voltage range is from 4.5v to 23v. a suitable large capacitor must be bypassed with this pin. 3 sw switching node. connect the output lc filter between the sw pin and output load. 4, 9 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 5 fb output voltage feedback input. the feedback reference voltage is 0.925v typically. 6 comp compensation node. this pin is used for compensating the regulation control loop. a series rc network is required to be connected from comp to gnd. if it is needed, an additional capacitor should be connected from comp to gnd. 7 en enable input. a logic high enables the converter, a logic low forces the converter into shutdown mode reducing the supply current to less than 3 a. for automatic startup, connect this pin to vin with a 100k pull up resistor. 8 ss soft-start control input. the soft-start period can be set by connecting a capacitor from the ss to gnd. a 0.1 f capacitor sets the soft-start period to 13ms typically. v out (v) r1 (k ) r2 (k ) r c (k ) c c (nf) l ( h) c out ( f) 15 153 10 30 3.9 33 22 x 2 10 97.6 10 20 3.9 22 22 x 2 8 76.8 10 15 3.9 22 22 x 2 5 45.3 10 13 3.9 15 22 x 2 3.3 26.1 10 6.8 3.9 10 22 x 2 2.5 16.9 10 6.2 3.9 6.8 22 x 2 1.8 9.53 10 4.3 3.9 4.7 22 x 2 1.2 3 10 3 3.9 3.6 22 x 2 table 1. recommended component selection typical application circuit vin en gnd boot fb sw 7 5 2 3 1 l1 10h 10nf 22fx2 r1 26.1k r2 10k v out 3.3v/3a 10fx2 v in 4.75v to 23v RT8250 ss 8 c ss 0.1f comp c c 3.9nf r c 6.8k c p nc 6 4, exposed pad(9) c boot c out c in 100k r en
RT8250 3 ds8250-05 march 2011 www.richtek.com function block diagram va + - + - + - uv comparator oscillator 340khz/110khz foldback control 0.5v internal regulator + - 2.5v shutdown comparator current sense amplifier boot vin gnd sw fb en comp 3v 5k va v cc slope comp current comparator ss 7a v cc + - ea 0.925v s r q q + - 1.2v lockout comparator + 100m 85m absolute maximum ratings (note 1) supply voltage, v in ------------------------------------------------------------------------------------------ ? 0.3v to 24v switching voltage, sw ------------------------------------------------------------------------------------- ? 0.3v to (v in + 0.3v) <20ns ---------------------------------------------------------------------------------------------------------- ? 0.3v to (v in + 3v) boot v oltage ------------------------------------------------------------------------------------------------- (v sw ? 0.3v) to (v sw + 6v) the other pins ------------------------------------------------------------------------------------------------ ? 0.3v to 6v power dissipation, p d @ t a = 25 c sop-8 (exposed pad) -------------------------------------------------------------------------------------- 1.333w package thermal resistance (note 2) sop-8 (exposed pad), ja --------------------------------------------------------------------------------- 75 c/w sop-8 (exposed pad), jc -------------------------------------------------------------------------------- 15 c/w junction temperature ---------------------------------------------------------------------------------------- 150 c lead temperature (soldering, 10 sec.) ------------------------------------------------------------------ 260 c storage temperature range ------------------------------------------------------------------------------- ? 65 c to 150 c esd susceptibility (note 3) hbm (human body mode) --------------------------------------------------------------------------------- 2kv mm (ma chine mode) ----------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) supply voltage, v in ------------------------------------------------------------------------------------------ 4.5v to 23v enable voltage, v en ----------------------------------------------------------------------------------------- 0v to 5.5v junction temperature range ------------------------------------------------------------------------------- ? 40 c to 125 c ambient temperature range ------------------------------------------------------------------------------- ? 40 c to 85 c
RT8250 4 ds8250-05 march 2011 www.richtek.com note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in the natural convection at t a = 25 c on a high effective thermal conductivity four-layer test board of jedec 51-7 thermal measurement standard. the case position of jc is on the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. electrical characteristics parameter symbol test conditions min typ max unit shutdown supply current v en = 0v -- 0.3 3 a supply current v en = 3 v, v fb = 1v -- 0.7 1.2 ma feedback voltage v fb 4.75v v in 23v 0.911 0.925 0.939 v error amplifier transconductance g ea ic = 10 a -- 1250 -- a/v high-side switch on-resistance r ds(on)1 -- 100 -- m low-side switch on-resistance r ds(on)2 -- 85 -- m high-side switch leakage current v en = 0v, v sw = 0v -- 0 10 a upper switch current limit min. duty cycle v boot ? v sw = 4.8v -- 5.5 -- a lower switch current limit from drain to source -- 1.4 -- a comp to current sense transconductance g cs -- 5.2 -- a/v oscillation freq uency f osc1 300 340 380 khz short circuit oscillation frequency f osc2 v fb = 0v -- 110 -- khz maximum duty cycle d max v fb = 0.8v -- 90 -- % minimum on time t on -- 200 -- ns logic-high v ih 2.7 -- -- en threshol d voltage logic-low v il -- -- 0.4 v input under voltage lockout threshold v in rising 3.8 4.2 4.4 v input under voltage lockout threshold hysterisis -- 200 -- mv soft-start current v ss = 0v -- 7 -- a soft-start period c ss = 0.1 f -- 13 -- ms thermal shutdown t sd -- 150 -- c (v in = 12v, t a = 25 c unless otherwise specified)
RT8250 5 ds8250-05 march 2011 www.richtek.com frequency vs. temperature 300 305 310 315 320 325 330 335 340 345 350 -50 -25 0 25 50 75 100 125 temperature frequency (khz ) typical operating characteristics efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 00.511.522.53 output current (a) efficiency (%) v in = 12v v in = 23v v out = 3.3v v in = 4.75v output voltage vs. output current 3.23 3.24 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 00.511.5 22.53 output current (a) output voltage (v) v in = 12v v in = 23v v in = 4.75v v out = 3.3v reference voltage vs. input voltage 0.920 0.922 0.924 0.926 0.928 0.930 0.932 4 6 8 1012141618202224 input voltage (v) reference voltage (v) v out = 3.3v, i out = 0a reference voltage vs. temperature 0.910 0.915 0.920 0.925 0.930 0.935 0.940 -50 -25 0 25 50 75 100 125 temperature reference voltage (v) v in = 6v, v out = 3.3v ( c) frequency. vs. input voltage 300 305 310 315 320 325 330 335 340 345 350 4 6 8 10 12 14 16 18 20 22 24 input voltage (v) frequency (khz) v out = 3.3v, i out = 0a v in = 12v, v out = 3.3v, i out = 0a ( c)
RT8250 6 ds8250-05 march 2011 www.richtek.com current limit vs. duty cycle 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 0 102030405060708090100 duty cycle (%) current limit (a) v out = 3.3v current limit vs. temperature 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 -50 -25 0 25 50 75 100 125 temperature current limit (a) v in = 12v, v out = 3.3v ( c) switching time (1 s/div) v in = 12v, v out = 3.3v, i out = 3a v out (10mv/div) v sw (10v/div) i l (2a/div) power on from v in time (5ms/div) v in (5v/div) v out (2v/div) i l (2a/div) v in = 12v, v out = 3.3v, i out = 3a power off from en time (1ms/div) v in = 12v, v out = 3.3v, i out = 3a v en (5v/div) v out (2v/div) i out (2a/div) power on from en time (5ms/div) v en (5v/div) v out (2v/div) i out (2a/div) v in = 12v, v out = 3.3v, i out = 3a
RT8250 7 ds8250-05 march 2011 www.richtek.com load transient response time (100 s/div) i out (2a/div) v out (200mv/div) v in = 12v, v out = 3.3v, i out = 0a to 1.5a load transient response time (100 s/div) v in = 12v, v out = 3.3v, i out = 0a to 3a i out (2a/div) v out (200mv/div)
RT8250 8 ds8250-05 march 2011 www.richtek.com application information the RT8250 is a synchronous high voltage buck converter that can support the input voltage range from 4.5v to 23v and the output current can be up to 3a. output voltage setting the resistive divider allows the fb pin to sense the output voltage as shown in figure 1. figure 1. output voltage setting the output voltage is set by an external resistive divider according to the following equation : ?? + ?? ?? out fb r1 v = v1 r2 where v fb is the feedback reference voltage (0.925v typ.). external bootstrap diode connect a 10nf low esr ceramic capacitor between the boot pin and sw pin. this capacitor provides the gate driver voltage for the high side mosfet. it is recommended to add an external bootstrap diode between an external 5v and the boot pin for efficiency improvement when input voltage is lower than 5.5v or duty ratio is higher than 65%. the bootstrap diode can be a low cost one such as 1n4148 or bat54. the external 5v can be a 5v fixed input from system or a 5v output of the RT8250. note that the external boot voltage must be lower than 5.5v. figure 2. external bootstrap diode soft-start the RT8250 contains an external soft-start clamp that gradually raises the output voltage. the soft-start timming inductor selection the inductor value and operating frequency determine the ripple current according to a specific input and output voltage. the ripple current i l increases with higher v in and decreases with higher inductance. out out l in vv i = 1 fl v ??? ? ?? ??? ? ??? ? having a lower ripple current reduces not only the esr losses in the output capacitors but also the output voltage ripple. high frequency with small ripple current can achieve highest efficiency operation. however, it requires a large inductor to achieve this goal. for the ripple current selection, the value of i l = 0.2375(i max ) will be a reasonable starting point. the largest ripple current occurs at the highest v in . to guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : out out l(max) in(max) vv l = 1 fi v ??? ? ? ??? ? ??? ? inductor core selection the inductor type must be selected once the value for l is known. generally speaking, high efficiency converters can not afford the core loss found in low cost powdered iron cores. so, the more expensive ferrite or mollypermalloy cores will be a better choice. the selected inductance rather than the core size for a fixed inductor value is the key for actual core loss. as the inductance increases, core losses decrease. unfortunately, increase of the inductance requires more turns of wire and therefore the copper losses will increase. ferrite designs are preferred at high switching frequency due to the characteristics of very low core losses. so, design goals can focus on the reduction of copper loss and the saturation prevention. r1 r2 v out RT8250 gnd fb 5v 10nf RT8250 sw boot can be programed by the external capacitor between ss pin and gnd. the chip provides a 7 a charge current for the external capacitor. if a 0.1 f capacitor is used to set the soft-start and its period will be 13ms(typ.).
RT8250 9 ds8250-05 march 2011 www.richtek.com ferrite core material saturates ? hard ? , which means that inductance collapses abruptly when the peak design current is exceeded. the previous situation results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy. however, they are usually more expensive than the similar powdered iron inductors. the rule for inductor choice mainly depends on the price vs. size requirement and any radiated field/ emi requirements. c in and c out selection the input capacitance, c in, is needed to filter the trapezoidal current at the source of the high side mosfet. to prevent large ripple current, a low esr input capacitor sized for the maximum rms current should be used. the rms current is given by : this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. for the input capacitor, a 10 f x 2 low esr ceramic capacitor is recommended. for the recommended capacitor, please refer to table 3 for more detail. the selection of c out is determined by the required esr to minimize voltage ripple. moreover, the amount of bulk capacitance is also a key for c out selection to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response as described in a later section. the output ripple, v out , is determined by : out in rms out(max) in out v v i = i 1 vv ? out l out 1 viesr 8fc ?? ?? + ?? ?? the output ripple will be highest at the maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirement. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr value. however, it provides lower capacitance density than other types. although tantalum capacitors have the highest capacitance density, it is important to only use types that pass the surge test for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr. however, it can be used in cost-sensitive applications for ripple current rating and long term reliability considerations. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load (esr) also begins to charge or discharge c out generating a feedback error signal for the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem.
RT8250 10 ds8250-05 march 2011 www.richtek.com thermal considerations for continuous operation, do not exceed the maximum operation junction temperature 125 c. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of RT8250, the maximum junction temperature is 125 c. the junction to ambient thermal resistance ja is layout dependent. for psop-8 package, the thermal resistance ja is 75 c/w on the standard jedec 51-7 four-layers thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c ? 25 c) / (75 c/w) = 1.333w for psop-8 package the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . for RT8250 package, the figure 3 of derating curve allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. layout consideration follow the pcb layout guidelines for optimal performance of the RT8250. ` keep the traces of the main current paths as short and wide as possible. ` put the input capacitor as close as possible to the device pins (vin and gnd). ` sw node is with high frequency voltage swing and should be kept at small area. keep sensitive components away from the sw node to prevent stray capacitive noise pick-up. ` place the feedback components to the fb pin and comp pin as close as possible. ` the gnd pin and exposed pad should be connected to a strong ground plane for heat sinking and noise protection. figure 3. derating curve for RT8250 package v in gnd c in 2 3 4 5 8 7 6 gnd ss boot vin gnd sw fb en comp gnd c s c p c c r c sw v out c out l1 input capacitor must be placed as close to the ic as possible. sw should be connected to inductor by wide and short trace. keep sensitive components away from this trace. the feedback components must be connected as close to the device as possible. r1 r2 v out figure 4. pcb layout guide 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 255075100125 ambient temperature maximum power dissipation (w) four-layer pcb ( c)
RT8250 11 ds8250-05 march 2011 www.richtek.com table 3. suggested capacitors for c in and c out component supplier series dimensions (mm) td k vlf10045 10 x 9.7 x 4.5 taiyo yuden nr8040 8x8x4 table 2. suggested inductors for typical application circuit component supplier part no. capacitance ( f) case size murata grm31cr61e106k 10 1206 td k c3225x5r1e106k 10 1206 taiyo yuden tmk316bj106ml 10 1206 murata grm31cr60j476m 47 1206 td k c3225x5r0j476m 47 1210 taiyo yuden emk325bj476mm 47 1210 murata grm32er71c226m 22 1210 td k c3225x5r1c226m 22 1210
RT8250 12 ds8250-05 march 2011 www.richtek.com information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property inf ringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications i s assumed by richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension a b j f h m c d i y x exposed thermal pad (bottom of package) 8-lead sop (exposed pad) plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 x 2.000 2.300 0.079 0.091 option 1 y 2.000 2.300 0.079 0.091 x 2.100 2.500 0.083 0.098 option 2 y 3.000 3.500 0.118 0.138

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